The NS31A is a general-purpose CPU with a single-issue, in-order 4-stage pipeline that uses a 32bits RISC-V ISA (RV32IMAF). It supports ISO 26262 ASIL D functional safety mechanism required for automotive applications, and also supports a privileged mode which required AUTOSAR Platform. NS31A is a highly efficient general-purpose CPU that is ideal for controlling various embedded systems, including automotive applications.

 

The NS31A is a ISO26262:2018 ASIL D compliant SEooC IP. The NS31A has integrated hardware safety features including error correction code (ECC : Error-Correcting Code) for memories, dual-core lockstep architecture for logics, bus protocol violations detection (EDC : Error Detection and Correction), These features enable this processor to meet ASIL D safety requirements without the need to add any external special safety mechanism.

 

 

 

 

You can purchase the NS31A core from the NSI-TEXE website here